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    "name": "why can't drm be completely encoded within lef",
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      "content": "since lef already specifies geometric constraints, what stops foundries from encoding all manufacturable geometry constraints solely within lef files so as to not have a non-standard design rule manual. similar for lib and electrical properties.\n\n\nis there a technical reason for the lef standard to not be able to encode all types of drm rules?",
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      "content": "How exactly does LEF encode geometric constraints ?!?!",
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      "content": "like min width, min spacing, placement sites, grid size etc. couldn't lef constructs be extended to indicate what is possible to manufacture?",
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      "content": "\"be extended\" ... well if you go with extension then everything is possible ... of course. you could extend LEF with a turing complete language.\n\nBut as the current spec, it's not even close to being able to describe DRC rules ... it can barely even describe the min subset for routing ... even then some of the rules described in the LEF are not the actual rule but some more restrictive variation because you can't describe the actual rule.",
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      "content": "just seems weird that signoff drc checking is one of the only things that doesn't yet have a 'dominant' standard/format and is still shipped as a manual that you implement",
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      "content": "I think it comes down to they are really complicated and varied across process ...",
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      "content": "Started thinking about this after looking at:-\n\nhttps://gitlab.com/Chips4Makers/PDKMaster\n\nand how difficult it would be to have a standard framework (if you could encode a process and then describe errors using a theorem prover like lean)",
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      "content": "The dominant standard format for DRC decks is Mentor Calibre decks, a proprietary format.",
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      "content": "It is unclear how the tecnology abstraction I use now will be able to handle the more complex design rules you get from 65nm on. For open source PDKs we are still in the era of 'easy/simple' design rules.",
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